DC-TO-DC CONVERTER

20120176108

13/234788

September 16, 2011

According to one embodiment, a DC-to-DC converter includes a high-side switch, a low-side switch, a high-side controller, and a low-side controller. The low-side switch is connected to the high-side switch in series. The high-side controller is configured to control the high-side switch. The low-side controller includes a first detector and an offset canceller. The first detector is configured to detect a current of the low-side switch. The offset canceller is configured to hold an output of the first detector as an offset voltage when the low-side switch is off and compensate an output of the first detector by the offset voltage when the low-side switch is on. The low-side controller is configured to compare a compensated output of the first detector with a reference voltage and turn off the low-side switch.

Goto, Yuichi (Kanagawa-ken, JP)

KABUSHIKI KAISHA TOSHIBA (Tokyo, JP)

1. A DC-to-DC converter comprising: a high-side switch; a low-side switch connected to the high-side switch in series; a high-side controller configured to control the high-side switch; and a low-side controller including: a first detector configured to detect a current of the low-side switch; and an offset canceller configured to hold an output of the first detector as an offset voltage when the low-side switch is off and compensate an output of the first detector by the offset voltage when the low-side switch is on, the low-side controller being configured to compare a compensated output of the first detector with a reference voltage and turn off the low-side switch.

2. The converter according to claim 1, wherein the low-side controller detects a zero cross of the output of the offset canceller and turns off the low-side switch.

3. The converter according to claim 1, wherein the first detector includes: a first detecting transistor; a first detecting resistor connected across the low-side switch through the first detecting transistor; and a first amplifier configured to amplify a voltage across the first detecting resistor.

4. The converter according to claim 3, wherein the first amplifier includes: a pair of current generators; a pair of input transistors configured to amplify a voltage across the first detecting resistor, the input transistors being supplied with constant currents from the pair of the current generators, one of the input transistors being connected to one end of the first detecting resistor through a first resistor, one other of the input transistors being connected to one other end of the first detecting resistor through a second resistor; and a pair of output transistors configured to amplify an output voltage of the pair of the input transistors, one of the output transistors feeding back the output voltage to the second resistor, one other of the output transistors outputting the output voltage to a third resistor connected to one end of the first detecting resistor.

5. The converter according to claim 4, wherein one of the input transistors is diode-connected.

6. The converter according to claim 4, wherein the input transistors are NMOSs.

7. The converter according to claim 4, wherein the input transistors are PMOSs.

8. The converter according to claim 4, wherein the current generators generate equal currents.

9. The converter according to claim 1, wherein the low-side controller compares the compensated output of the first detector with a ground potential, and turns off the low-side switch.

10. The converter according to claim 1, wherein the low-side controller further includes a first latch circuit reset by the output of the offset canceller.

11. The converter according to claim 1, wherein the high-side controller includes a second detector configured to detect a current of the high-side switch.

12. The converter according to claim 1, wherein the high-side controller includes a clock oscillator.

13. The converter according to claim 1, wherein the offset canceller includes: a comparator having a negative input terminal connected to a ground; a first switch element configured to be turned on when the high-side switch is on and to be turned off when the high-side switch is off, the first switch element connected between a positive input terminal of the comparator and the ground; and a first capacitor configured to be charged with the offset voltage when the high-side switch is off, the first capacitor connected between the positive input terminal of the comparator and the first detector.

14. The converter according to claim 1, further comprising: an inductor having one end and one other end, the one end of the inductor connected at a connection point between the high-side switch and the low-side switch; a smoothing capacitor connected between the one other end of the inductor and a ground; and a feedback resistor configured to feed back a voltage at the one other end of the inductor to the high-side controller, the feedback resistor connected between the one other end of the inductor and the ground.

15. The converter according to claim 14, wherein the low-side controller detects a zero cross of the output of the offset canceller and turns off the low-side switch.

16. The converter according to claim 14, wherein the first detector includes: a first detecting transistor; a first detecting resistor connected across the low-side switch through the first detecting transistor; and a first amplifier configured to amplify a voltage across the first detecting resistor.

17. The converter according to claim 16, wherein the first amplifier includes: a pair of current generators; a pair of input transistors configured to amplify a voltage across the first detecting resistor, the input transistors being supplied with constant currents from the pair of the current generators, one of the input transistors being connected to one end of the first detecting resistor through a first resistor, one other of the input transistors being connected to one other end of the first detecting resistor through a second resistor; and a pair of output transistors configured to amplify an output voltage of the pair of the input transistors, one of the output transistors feeding back the output voltage to the second resistor, one other of the output transistors outputting the output voltage to a third resistor connected to one end of the first detecting resistor.

18. The converter according to claim 17, wherein one of the input transistors is diode-connected.

19. The converter according to claim 14, wherein the low-side controller compares the compensated output of the first detector with a ground potential, and turns off the low-side switch.

20. The converter according to claim 14, wherein the low-side controller further includes a first latch circuit reset by the output of the offset canceller.

323/271

05

edspap.20120176108