نتائج البحث

Efficiently Scheduling Parallel DAG Tasks on Identical Multiprocessors

• Authors : Lendve, Shardul; Bletsas, Konstantinos; Souto, Pedro F.

Subjects: Computer Science - Distributed, Parallel, and Cluster Computing; 68W99; C.1.2

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Simulation-based fault-tolerant multiprocessors system.

• Authors : Al-Allaf, Ahmad F.¹ ; Farej, Ziyad Khalaf¹

• Source: Telkomnika. Apr2023, Vol. 21 Issue 2, p354-363. 10p.

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Bounding the execution time of parallel applications on unrelated multiprocessors

• Authors : Voudouris, Petros, 1987; Stenström, Per, 1957; Pathan, Risat, 1979

Subjects: heterogeneous; Real-time Scheduling; scheduling

• Source: Meeting Challenges in Computer Architecture (MECCA) Real-Time Systems. 58(2):189-232

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Multistep temperature prediction for proactive thermal management on chip multiprocessors.

• Authors : Revathi, N.¹ (AUTHOR) ; Sumathi, G.² (AUTHOR)

• Source: Journal of Supercomputing. Aug2021, Vol. 77 Issue 8, p8967-8994. 28p.

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Energy Conscious Dynamic Window Scheduling of Chip Multiprocessors

• Authors : Michel, Matthew; Lee, Hyunyoung

Subjects: Computer Science - Distributed, Parallel, and Cluster Computing

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Energy-efficient Non Uniform Last Level Caches for Chip-multiprocessors Based on Compression

• Authors : Safayenikoo, Pooneh; Asad, Arghavan; Fathy, Mahmood

Subjects: Computer Science - Hardware Architecture

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A metadata-driven approach to efficiently detect code-reuse attacks on ARM multiprocessors.

• Authors : Oh, Hyunyoung¹ (AUTHOR); Cho, Yeongpil² (AUTHOR) ; Paek, Yunheung¹ (AUTHOR)

• Source: Journal of Supercomputing. Jul2021, Vol. 77 Issue 7, p7287-7314. 28p.

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Efficient synchronization and communication in many-core chip multiprocessors

• Authors : Abellán Miguel, José Luis;

Subjects: sincronización hardware; hardware synchronization; coherencia de cache

• Source: TDR (Tesis Doctorales en Red)

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Hardware Techniques for High-Performance Transactional Memory in Many-Core Chip Multiprocessors

• Authors : Titos Gil, José Rubén;

Subjects: memoria transaccional; transactional memory; programación paralela

• Source: TDR (Tesis Doctorales en Red)

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Adaptive Thread Scheduling in Chip Multiprocessors.

• Authors : Akturk, Ismail¹ (AUTHOR) ; Ozturk, Ozcan² (AUTHOR)

• Source: International Journal of Parallel Programming. Dec2019, Vol. 47 Issue 5/6, p1014-1044. 31p.

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