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Supporting Runtime Reconfigurable VLIWs Cores Through Dynamic Binary Translation

• Authors : Rokicki, Simon; Rohou, Erven; Derrien, Steven ...

Subjects: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.5: Heterogeneous (hybrid) systems; ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.0: Adaptable architectures; ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.4: Multiple-instruction-streamDresden; Germany

• Source: DATE 2018 - IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition ; https://hal.science/hal-01653110 ; DATE 2018 - IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition,

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Chip Set Gives TV Sets JPEG-Image Display Ability.

• Authors : Bursky, Dave

• Source: Electronic Design. 8/18/2003, Vol. 51 Issue 18, p30. 1/2p. 1 Color Photograph.

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An Energy-Aware Scheduler for Dynamically Reconfigurable Multi-Core Systems

• Authors : Bonamy, Robin; Bilavarn, Sébastien; Muller, Fabrice ...

Subjects: multiprocessing systems; power aware computing; schedulingBremen; Germany

• Source: 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2015https://hal.science/hal-011927966th International Workshop on Reconfigurable

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Splittable Single Source-Sink Routing on CMP Grids: A Sublinear Number of Paths Suffice

• Authors : Kosowski, Adrian; Uznanski, Przemyslaw;

Subjects: [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]Aachen; Germany

• Source: Euro-Par - 19th International Conference on Parallel Processing ; https://inria.hal.science/hal-00737611 ; Euro-Par - 19th International Conference on Parallel Processing, Aug 2013, Aachen,

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Investigating performance variations of an optimized GPU-ported granulometry algorithm

• Authors : Boulos, Vincent; Fristot, Vincent; Houzet, Dominique ...

Subjects: [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing; [INFO.INFO-TS]Computer Science [cs]/Signal and Image ProcessingKarlsruhe; Germany

• Source: DASIP 2012 Proceedings ; DASIP 2012 - Conference on Design and Architectures for Signal and Image Processing ; https://hal.science/hal-00787861 ; DASIP 2012 - Conference on Design and Architectures

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Predictable Embedding of Large Data Structures in Multiprocessor Networks-on-Chip

• Authors : Stuijk, Sander; Basten, Twan; Mesman, Bart ...

Subjects: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]; [SPI.TRON]Engineering Sciences [physics]/ElectronicsMunich; Germany

• Source: Design, Automation and Test in Europe ; DATE'05 ; https://hal.archives-ouvertes.fr/hal-00181524 ; DATE'05, Mar 2005, Munich, Germany. pp.254-255

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