نتائج البحث

Hardware-efficient and accurately frequency offset compensation based on feedback structure and polar coordinates processing.

• Authors : Zhang, Xuefeng¹ (AUTHOR); Ju, Cheng^1,2,3 (AUTHOR) ; Wang, Dongdong^2,3 (AUTHOR)

• Source: Optical & Quantum Electronics. Feb2023, Vol. 55 Issue 2, p1-11. 11p.

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Methodology for Hardware testing of an Application Specific Integrated Circuit (ASIC).

• Authors : KaurBrar, Navneet¹ ; Bansal, Manu² ; Agarwal, Alpana³

• Source: Journal of Pharmaceutical Negative Results. 2022 Special Issue, Vol. 13, p2012-2016. 5p.

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High performance accelerators for deep neural networks: A review.

• Authors : Akhoon, Mohd Saqib¹ (AUTHOR); Suandi, Shahrel A.¹ (AUTHOR); Alshahrani, Abdullah² (AUTHOR)

• Source: Expert Systems. Jan2022, Vol. 39 Issue 1, p1-23. 23p.

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FACILITATING FLEXIBILITY: MANY ELECTRONICS SUPPLIERS PROVIDE A MULTITUDE OF OPTIONS TO MEDICAL DEVICE MANUFACTURERS WHO REQUIRE CUSTOM SOLUTIONS.

• Authors : CRAWFORD, MARK

Subjects: MEDICAL electronics; ELECTRONIC equipment; APPLICATION-specific integrated circuits

• Source: Medical Product Outsourcing. Sep2024, Vol. 22 Issue 7, p80-90. 7p.

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Efficient Edge-AI Application Deployment for FPGAs †.

• Authors : Kalapothas, Stavros¹ (AUTHOR) ; Flamis, Georgios¹ (AUTHOR); Kitsos, Paris¹ (AUTHOR)

• Source: Information (2078-2489). Jun2022, Vol. 13 Issue 6, p279. 12p.

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Scalable reservoir computing on coherent linear photonic processor.

• Authors : Nakajima, Mitsumasa¹ ; Tanaka, Kenji¹; Hashimoto, Toshikazu¹

• Source: Communications Physics. 2/10/2021, Vol. 4 Issue 1, p1-12. 12p.

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Advanced Net Flux Radiometer for the Ice Giants.

• Authors : Aslam, S.¹ (AUTHOR) ; Achterberg, R. K.² (AUTHOR); Calcutt, S. B.³ (AUTHOR)

• Source: Space Science Reviews. Feb2020, Vol. 216 Issue 1, p1-20. 20p.

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PRODUCTS applications.

• Source: Military & Aerospace Electronics. Oct2021, Vol. 32 Issue 10, p46-48. 3p.

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VHDL Descriptions for the FPGA Implementation of PWL-Function-Based Multi-Scroll Chaotic Oscillators.

• Authors : Tlelo-Cuautle, Esteban^1,2 ; Quintas-Valles, Antonio de Jesus¹; de la Fraga, Luis Gerardo²

Subjects: *VHDL (Computer hardware description language); *FIELD programmable gate arrays; *CHAOS generators

• Source: PLoS ONE. 12/20/2016, Vol. 11 Issue 12, p1-32. 32p.

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Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems

• Authors : Marcello Barbirotta; Francesco Menichelli; Abdallah Cheikh

Subjects: Circuit faults; digital integrated circuits; fault detection

• Source: IEEE Access, Vol 12, Pp 95720-95735 (2024)

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