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Conference

Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors

Subjects: [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/MicroelectronicsTaipei; Taiwan

  • Source: 2020 IEEE International Test Conference in Asia (ITC-Asia)ITC-Asia 2020 - 4th International Test Conference in Asiahttps://hal-lirmm.ccsd.cnrs.fr/lirmm-03033821ITC-Asia 2020 - 4th

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Conference

Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors

Subjects: [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/MicroelectronicsTaipei; Taiwan

  • Source: 2020 IEEE International Test Conference in Asia (ITC-Asia)ITC-Asia 2020 - 4th International Test Conference in Asiahttps://hal-lirmm.ccsd.cnrs.fr/lirmm-03033821ITC-Asia 2020 - 4th

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Conference

Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors

Subjects: [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/MicroelectronicsTaipei; Taiwan

  • Source: IEEE International Test Conference in Asia (ITC-Asia) ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-03033821 ; IEEE International Test Conference in Asia (ITC-Asia), Sep 2020, Taipei, Taiwan. pp.35-40,

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Academic Journal

Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications

Subjects: triple-node upset; latch design; self-recoverability

  • Source: ISSN: 0026-2692 ; Microelectronics Journal ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-03380265 ; Microelectronics Journal, 2021, 111, pp.#105034. ⟨10.1016/j.mejo.2021.105034⟩.

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Academic Journal

Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications

Subjects: triple-node upset; latch design; self-recoverability

  • Source: ISSN: 0026-2692 ; Microelectronics Journal ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-03380265 ; Microelectronics Journal, 2021, 111, pp.#105034. ⟨10.1016/j.mejo.2021.105034⟩.

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Academic Journal

Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications

Subjects: triple-node upset; latch design; self-recoverability

  • Source: ISSN: 0026-2692 ; Microelectronics Journal ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-03380265 ; Microelectronics Journal, Elsevier, 2021, 111, pp.#105034. ⟨10.1016/j.mejo.2021.105034⟩.

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Conference

Sextuple Cross-Coupled-DICE Based Double-Node-Upset Recoverable and Low-Delay Flip-Flop for Aerospace Applications

Subjects: Harsh radiation; flip-flop reliability; soft errorIrvine; CA; United States

  • Source: GLVLSI 2022 - 32nd ACM Great Lakes Symposium on VLSI ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-03770880 ; GLVLSI 2022 - 32nd ACM Great Lakes Symposium on VLSI, Jun 2022, Irvine, CA, United States.

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Conference

Sextuple Cross-Coupled-DICE Based Double-Node-Upset Recoverable and Low-Delay Flip-Flop for Aerospace Applications

Subjects: Harsh radiation; flip-flop reliability; soft errorIrvine; CA; United States

  • Source: GLVLSI 2022 - 32nd ACM Great Lakes Symposium on VLSI ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-03770880 ; GLVLSI 2022 - 32nd ACM Great Lakes Symposium on VLSI, Jun 2022, Irvine, CA, United States.

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