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Academic Journal

Objective Optimization for Multilevel Neutral-Point-Clamped Converters with Zero-Sequence Signal Control

  • Source: Yuan , X , Yongdong , L & Chenchen , W 2010 , ' Objective Optimization for Multilevel Neutral-Point-Clamped Converters with Zero-Sequence

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Academic Journal

Dynamic Transients and Reliability of High-Voltage Silicon & 4H-SiC Bipolar Junction Transistors Under Avalanche and Short-Circuits

  • Source: Hosseinzadehlish , M , Jahdi , S , Yuan , X , Ortiz Gonzalez , J A & Alatise , O 2024 , Dynamic Transients and Reliability of High-Voltage

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Academic Journal

Automated Triple Pulse Testbed (ATPT) 1.0 – Large-Signal Hardware-in-the-loop Characterization Platform for Power Magnetics

  • Source: Cui , B , Wang , J , Yuan , X , Aguarón , J , Martínez , A & Cabaleiro , F 2024 , Automated Triple Pulse Testbed (ATPT) 1.0 –

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Academic Journal

Design and Implementation of a dv/dt Filter for Motor Overvoltage Mitigation in SiC-Based Adjustable Speed Drives

  • Source: Zhou , W , Zhang , Z , Yuan , X & Diab , M 2024 , Design and Implementation of a dv/dt Filter for Motor Overvoltage Mitigation in

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Academic Journal

An Active dv/dt Filter to Combat Motor Terminal Overvoltage in SiC-Based Adjustable Speed Drives

  • Source: Zhou , W , Yuan , X & Zhang , Z 2024 , ' An Active dv/dt Filter to Combat Motor Terminal Overvoltage in SiC-Based Adjustable Speed Drives

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Academic Journal

Evaluation of the Impact of Switching Speed on Inductors in SiC Converters

Subjects: triple pulse test; core loss; SiC

  • Source: Cui , B , Wang , J , Yang , J & Yuan , X 2023 , Evaluation of the Impact of Switching Speed on Inductors in SiC Converters . in PCIM

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Academic Journal

Impact of Temperature and Base Bias Stress on the Static Characteristics of Silicon and 4H-SiC NPN Vertical Power BJTs

  • Source: Hosseinzadehlish , M , Jahdi , S , Shen , C , Yuan , X , Laird , I , Alatise , O & Gonzalez , J O 2023 , Impact of Temperature and Base

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Conference

Device power loss calculation for a multi-level DC-AC converter design optimisation

  • Source: Laird , I , Wang , J & Yuan , X 2022 , ' Device power loss calculation for a multi-level DC-AC converter design optimisation ' , Paper

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Academic Journal

A 1200V DC-link Hybrid Si/SiC Four-level ANPC Inverter with Balanced Loss Distribution, dv/dt and Cost

Subjects: multilevel converter; Silicon Carbide; hybrid

  • Source: Wang , J , Xie , L , Yuan , X , Zhou , W & Laird , I 2022 , A 1200V DC-link Hybrid Si/SiC Four-level ANPC Inverter with Balanced Loss

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