نتائج البحث

Adaptive Techniques for Overcoming Performance Degradation due to Aging in CMOS Circuits

• Authors : Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar ...

• Source: http://www.ee.umn.edu/users/sachin/jnl/tvlsi11sk.pdf.

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A Finite-Oxide Thickness Based Analytical Model for Negative Bias Temperature Instability

• Authors : Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar ...

Subjects: Key Terms; Negative Bias Temperature Instability (NBTI; Reaction-Diffusion (R-D) Model

• Source: http://www.ee.umn.edu/users/sachin/jnl/tdmr09.pdf.

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Reliability-aware and Variation-aware Cad Techniques

• Authors : Sanjay V. Kumar; The Pennsylvania State University CiteSeerX Archives

• Source: http://www-mount.ece.umn.edu/~sachin/Theses/SanjayKumar.pdf.

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Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems“,pp

• Authors : Sanjay V Kumar; Chris H Kim; Sachin S Sapatnekar ...

• Source: http://www.cecs.uci.edu/%7Epapers/aspdac06/pdf/p559_6A-1.pdf.

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Mathematically Assisted Adaptive Body Bias (ABB) for Temperature Compensation in Gigascale LSI Systems

• Authors : Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar ...

Subjects: Index Terms; Delay; Leakage

• Source: http://www.ee.umn.edu/users/sachin/conf/aspdac06sk.pdf.

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Impact of NBTI on SRAM read stability and design for reliability

• Authors : Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar ...

Subjects: Index Terms; Negative Bias Temperature Instability (NBTI; SRAM

• Source: http://www.ee.umn.edu/users/sachin/conf/isqed06sk.pdf.

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An analytical model for negative bias temperature instability

• Authors : Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar ...

• Source: http://www.cecs.uci.edu/%7Epapers/iccad06/papers/6D_1.pdf.

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Body Bias Voltage Computations for Process and Temperature Compensation

• Authors : Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar ...

Subjects: Index Terms; Delay; Leakage

• Source: http://www.ee.umn.edu/users/sachin/jnl/tvlsi08sk.pdf.

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Circuit Reliability: From Physics to Architectures Embedded Tutorial Paper

• Authors : Jianxin Fang; Saket Gupta; Sanjay V. Kumar ...

Subjects: electromigration; 3D ICs; stress

• Source: http://www.ee.umn.edu/users/sachin/conf/iccad12tut.pdf.

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A holistic analysis of circuit timing variations in 3D-ICs with thermal and TSV-induced

• Authors : Sravan K. Marella; Sanjay V. Kumar; Sachin S. Sapatnekar ...

Subjects: Key Terms; 3D IC; Through Silicon Via

• Source: http://www.ee.umn.edu/users/sachin/conf/iccad12sm.pdf.

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