Method for making a semiconductor superlattices with different non-semiconductor thermal stabilities

12191,160

17/305192

July 01, 2021

A method for making a semiconductor device may include forming first and second superlattices adjacent a semiconductor layer. Each of the first and second superlattices may include stacked groups of layers, with each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The second superlattice may have a greater thermal stability with respect to non-semiconductor atoms therein than the first superlattice. The method may further include heating the first and second superlattices to cause non-semiconductor atoms from the first superlattice to migrate toward the at least one non-semiconductor monolayer of the second superlattice.

Atomera Incorporated (Los Gatos, CA, US)

ATOMERA INCORPORATED (Los Gatos, CA, US)

1. A method for making a semiconductor device comprising: forming first and second superlattices adjacent a semiconductor layer and each comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, the second superlattice having a greater thermal stability with respect to thermally induced migration of non-semiconductor atoms from positions within the second superlattice than thermally induced migration of non-semiconductor atoms from positions within the first superlattice; and heating the first and second superlattices to cause non-semiconductor atoms from the first superlattice to migrate toward the at least one non-semiconductor monolayer of the second superlattice.

2. The method of claim 1 wherein the first superlattice is below the second superlattice; and further comprising forming a third superlattice above the second superlattice and comprising a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; wherein the second superlattice has a greater thermal stability with respect to non-semiconductor atoms than the third superlattice.

3. The method of claim 1 further comprising forming a semiconductor layer above the first and second superlattices at a temperature of at least 1000° C. and for a time period of at least thirty seconds.

4. The method of claim 3 wherein the semiconductor layer has a thickness of at least 500 nm.

5. The method of claim 1 wherein forming the second superlattice comprises forming the second superlattice at a temperature above 600° C.

6. The method of claim 1 wherein forming the first superlattice comprises forming the first superlattice at a temperature below 600° C.

7. The method of claim 1 further comprising forming a semiconductor cap layer above the first and second superlattices.

8. The method of claim 1 wherein heating comprises annealing in an ambient comprising one or more of the group of hydrogen, nitrogen, helium, and argon.

9. The method of claim 1 wherein the at least one non-semiconductor monolayer of the first and second superlattices comprises oxygen.

10. The method of claim 1 wherein the base semiconductor layers of the first and second superlattices comprise silicon.

11. A method for making a semiconductor device comprising: forming first and second superlattices adjacent a semiconductor layer and each comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, the second superlattice having a greater thermal stability with respect to thermally induced migration of non-semiconductor atoms from positions within the second superlattice than thermally induced migration of non-semiconductor atoms from positions within the first superlattice; and heating the first and second superlattices to cause non-semiconductor atoms from the first superlattice to migrate toward the at least one non-semiconductor monolayer of the second superlattice; wherein forming the second superlattice comprises forming the second superlattice at a temperature above 600° C., and forming the first superlattice comprises forming the first superlattice at a temperature below 600° C.

12. The method of claim 11 wherein the first superlattice is below the second superlattice; and further comprising forming a third superlattice above the second superlattice and comprising a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; and wherein the second superlattice has a greater thermal stability with respect to non-semiconductor atoms than the third superlattice.

13. The method of claim 11 further comprising forming a semiconductor layer above the first and second superlattices at a temperature of at least 1000° C. and for a time period of at least thirty seconds.

14. The method of claim 13 wherein the semiconductor layer has a thickness of at least 500 nm.

15. The method of claim 11 further comprising forming a semiconductor cap layer above the first and second superlattices.

16. The method of claim 11 wherein heating comprises annealing in an ambient comprising one or more of the group of hydrogen, nitrogen, helium, and argon.

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