Reduction of interface and oxide traps in SiO₂/GaN MOS structures by oxygen and forming gas annealing

IOP Publishing 2023-03-20

This is the Accepted Manuscript version of an article accepted for publication in Applied Physics Express. IOP Publishing Ltd are not responsible for any errors or omissions in this version of the manuscript or any version derived from it. The Version of Record is available online at https://doi.org/10.35848/1882-0786/acc1bd.
The effect of post-deposition annealing on the electrical characteristics of SiO₂/GaN MOS devices was investigated. While the key to the improvement was using oxygen annealing to form an interfacial GaOx layer and forming gas annealing to passivate the remaining defects, caution must be taken not to produce a fixed charge through reduction of the GaOx layer. By growing the GaOx layer with oxygen annealing at 800 ℃ and performing forming gas annealing at a low temperature of 200 ℃, it became possible to suppress the reduction of GaOx and to reduce the interface traps, oxide traps, and fixed charge simultaneously.

Journal Article; AM

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JPNII oai:irdb.nii.ac.jp:01056:0005733074
18820778
18820786
AA12295133
Applied Physics Express, 16(3), 031004-
1375175908

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