High-speed reconfigurable advanced-utilization unified modular operation unit

Through comparison, algorithm optimization, pipeline accelerated design and structural compatibility extension of a large number of mainstream algorithm, this paper propose an algorithm that is good for modulo operation structure compatibility: improved radix-4 interleaved modular multiplication algorithm. It has advantages of short path and simple structure, and has advantages in compatibility design, can achieve full flow accelerated operation, and achieve the high speed and reconfigurable design purposes. The improved radix-4 interleaved modular multiplication unit proposed in this paper can directly realize plus-minus module division and modular addition without adding extra structure, which solves the problem of the waste of independent resources. The unified modular unit is synthesized under the 65 nm CMOS process. The area is 0.117 mm2. The clock frequency is 526 MHz. A 576 bit modular multiplication and modular division are completed at 0.55 μs and 2.98 μs respectively.