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Hybrid Hardening Approach for a Fault-Tolerant RISC-V System-on-Chip

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اقرأ أكثر حفظ في قائمتي
  • معلومة اضافية
    • Contributors:
      Radiations et composants (RADIAC); Institut d’Electronique et des Systèmes (IES); Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM); Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM); Universidad Carlos III de Madrid Madrid (UC3M); Fiabilité et Systèmes en Environnements Contraints (FSEC)
    • بيانات النشر:
      HAL CCSD
    • الموضوع:
      2023
    • Collection:
      Archive ouverte HAL (Hyper Article en Ligne, CCSD - Centre pour la Communication Scientifique Directe)
    • الموضوع:
      Toulouse; France
    • نبذة مختصرة :
      International audience ; We propose fault tolerance strategies applied to a soft-core RISC-V-based System-on-Chip. Notably, we investigate the effectiveness of a multilayer hardening strategy, which combines software recoverability and hardware redundancy. As validation, a neutron irradiation campaign was performed.
    • Relation:
      hal-04266891; https://hal.science/hal-04266891; https://hal.science/hal-04266891/document; https://hal.science/hal-04266891/file/2023___RADECS___Hybrid_Hardening_Approach_for_a_Fault_Tolerant_RISC_V_System_on_Chip.pdf
    • Rights:
      info:eu-repo/semantics/OpenAccess
    • الرقم المعرف:
      edsbas.CBD6EDFB