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Circuit Design Techniques for Implantable Closed-Loop Neural Interfaces

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  • معلومة اضافية
    • بيانات النشر:
      KTH, Integrerade komponenter och kretsar
      Stockholm
    • الموضوع:
      2019
    • Collection:
      Royal Inst. of Technology, Stockholm (KTH): Publication Database DiVA
    • نبذة مختصرة :
      Implantable neural interfaces are microelectronic systems, which have the potential to enable a wide range of applications, such as diagnosis and treatment of neurological disorders. These applications depend on neural interfaces to accurately record electrical activity from the surface of the brain, referred to as electrocorticography (ECoG), and provide controlled electrical stimulation as feedback. Since the electrical activity in the brain is caused by ionic currents in neurons, the bridge between living tissue and inorganic electronics is achieved via microelectrode arrays. The conversion of the ionic charge into freely moving electrons creates a built-in electrode potential that is several orders of magnitude larger than the ECoG signal, which increases the dynamic range, resolution, and power consumption requirements of neural interfaces. Also, the small surface area of microelectrodes implies a high-impedance contact, which can attenuate the ECoG signal. Moreover, the applied electrical stimulation can also interfere with the recording and ultimately cause irreversible damages to the electrodes or change their impedance. This thesis is devoted to resolving the challenges of high-resolution recording and monitoring the electrode impedance in implantable neural interfaces. The first part of this thesis investigates the state-of-the-art neural interfaces for ECoG and identifies their limitations. As a result of the investigation, a high-resolution ADC is proposed and implemented based on a ΔΣ modulator. In order to enhance performance, dynamic biasing and area-efficient switched-capacitor circuits were proposed. The ΔΣ modulator is combined with the analog front-end to provide a complete readout solution for high-resolution ECoG recording. The corresponding chip prototype was fabricated in a 180 nm CMOS process, and the measurement results showed a 14-ENOB over a 300-Hz bandwidth while dissipating 54-μW. The second part of this thesis expands upon the well-known methods for impedance measurements and ...
    • File Description:
      application/pdf
    • Relation:
      TRITA-EECS-AVL; 2019:33
    • الدخول الالكتروني :
      http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-249435
    • Rights:
      info:eu-repo/semantics/openAccess
    • الرقم المعرف:
      edsbas.B843A8C6