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MEMS Four-Terminal Variable Capacitor for low power Capacitive Adiabatic Logic with High Logic State Differentiation

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  • معلومة اضافية
    • Contributors:
      Electronique, Systèmes de communication et Microsystèmes (ESYCOM); Conservatoire National des Arts et Métiers CNAM (CNAM)-Université Paris-Est Marne-la-Vallée (UPEM)-ESIEE Paris; Génie Enzymatique et Cellulaire (GEC); Université de Technologie de Compiègne (UTC)-Centre National de la Recherche Scientifique (CNRS); Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI); Direction de Recherche Technologique (CEA) (DRT (CEA)); Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA); Département d'Electronique, des Détecteurs et d'Informatique pour la Physique (ex SEDI) (DEDIP); Institut de Recherches sur les lois Fondamentales de l'Univers (IRFU); Université Paris-Saclay-Direction de Recherche Fondamentale (CEA) (DRF (CEA)); Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Paris-Saclay-Direction de Recherche Fondamentale (CEA) (DRF (CEA)); Département d'Architectures, Conception et Logiciels Embarqués-LETI (DACLE-LETI); Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)); Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes 2016-2019 (UGA 2016-2019 )
    • بيانات النشر:
      HAL CCSD
      Elsevier
    • الموضوع:
      2018
    • Collection:
      Université Grenoble Alpes: HAL
    • نبذة مختصرة :
      International audience ; This paper presents a novel four-terminal variable capacitor (FTVC) dedicated to the recent concept of low power capacitive adiabatic logic (CAL). This FTVC is based on silicon nano/micro technologies and is intended to achieve adiabatic logic functions with a better efficiency that by using field effect transistor (FET). The proposed FTVC consists of two capacitors mechanically coupled and electrically isolated, where a comb-drive input capacitor controls a gap-closing capacitor at the output. To fully implement the adiabatic combinational logic, we propose two types of variable capacitors: a positive variable capacitor (PVC) where the output capacitance value increases with the input voltage, and a negative variable capacitance (NVC) where the output capacitance value decreases when the input voltage increases. A compact and accurate electromechanical model has been developed. The electromechanical simulations demonstrate the ability of the proposed FTVC devices for CAL, with improved features such as high logic states differentiation larger than 50% of the full-scale input signal and cascability of both buffers and inverters. Based on the presented analysis, 89% of the total injected energy in the device can be recovered, the remaining energy being dissipated through mechanical damping. During one cycle of operation, a buffer gate of 10x2.5 µm 2 dissipates only 0.9 fJ.
    • Relation:
      hal-01910144; https://hal.science/hal-01910144; https://hal.science/hal-01910144/document; https://hal.science/hal-01910144/file/Main%20paper_HAL.pdf
    • الرقم المعرف:
      10.1016/j.nanoen.2018.10.059
    • Rights:
      info:eu-repo/semantics/OpenAccess
    • الرقم المعرف:
      edsbas.8CB3067D