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Hot-carrier evaluation of a zero-cost transistor developed via process optimization in an embedded non-volatile memory CMOS technology

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  • معلومة اضافية
    • Contributors:
      Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (IM2NP); Aix Marseille Université (AMU)-Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS); Aix Marseille Université (AMU); Laboratoire de Polytech Nice-Sophia (Polytech'Lab); Université Nice Sophia Antipolis (1965 - 2019) (UNS)-Université Côte d'Azur (UCA); ST Microélectronics; ST Microélectronic; Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI); Direction de Recherche Technologique (CEA) (DRT (CEA)); Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA); STMicroelectronics Rousset (ST-ROUSSET); STMicroelectronics
    • بيانات النشر:
      HAL CCSD
      Elsevier
    • الموضوع:
      2021
    • نبذة مختصرة :
      International audience ; A new transistor architecture is developed by reusing already existing fabrication process bricks in an embedded nonvolatile memory (eNVM) sub-40 nm CMOS technology, resulting in a middle-voltage zero-cost transistor, ideal for lowcost products. TCAD simulations are undertaken to confirm the feasibility of the process optimization and predict the transistor performance. The new transistor is fabricated then electrically characterized. The new device shows good analogue performances for no cost added. A hot-carrier injection (HCI) degradation evaluation is performed and confirms the reliability of the device. .
    • Relation:
      hal-03500203; https://hal.science/hal-03500203; https://hal.science/hal-03500203/document; https://hal.science/hal-03500203/file/MICREL-Paul.pdf
    • الرقم المعرف:
      10.1016/j.microrel.2021.114265
    • Rights:
      info:eu-repo/semantics/OpenAccess
    • الرقم المعرف:
      edsbas.8C1EC5D7