ANALYTICAL MODEL FOR SURFACE POTENTIAL AND INVERSION CHARGE OF DUAL MATERIAL DOUBLE GATE SON MOSFET

A simple analytical model of a nanoscale fully depleted dual- material gate (DMG) SOI and SON MOSFETs has been developed and their performance comparison analysis is presented in this paper. An analytical model for the surface potential and threshold voltage has been developed both for these structures using a generalized 2D Poisson's equation solution. The DMG SON MOSFET technology is found to have more potential against various short channel effects (SCEs) thereby offering further device scalability with improved immunity. Double-gate MOSFETs seem to be a very promising option for ultimate scaling of CMOS technology. Excellent short-channel effect (SCE) immunity, high transconductance, and ideal sub threshold performance have been reported from theoretical and experimental work on this device. In particular, asymmetrical DG SOI MOSFETs are becoming popular since these structures provide a desirable threshold voltage unlike symmetrical DG SOI MOSFETs. To enhance the immunity against SCEs, a new structure called a dual-material (DMG) gate MOSFET has been proposed. A dual-material gate structure induces the peak of the electric field at the interface between the different materials, which enhances the carrier's speed and improves the device's performance. In the era of VLSI/ ULSI, with the aim of fabricating low power, high speed and energy efficient devices, silicon on insulator (SOI) technology has been recognized as a favorable solution for enhancing the performance of CMOS because of their several advantages over traditional bulk CMOS technology in terms of higher speed, lower power dissipation, high radiation tolerance, lower parasitic capacitance and lower short channel effects. But, this technology has been cursed by two most crucial disadvantages like threshold voltage roll-off and DIBL which have been moderated with the introduction of a modified SOI structure, i.e., Silicon on Nothing (SON) where the thick buried oxide layer is replaced with “nothing” layer. Due to the lower dielectric permittivity of ...